#ci logs with #osvvm builds

https://builds.sr.ht/~csantosb/job/1500903#task-compile_osvvm

custom #makefile testing

https://builds.sr.ht/~csantosb/job/1500903#task-test

#hdlmake simulation

https://builds.sr.ht/~csantosb/job/1500903#task-test_hdlmake_sim

and #yosys synthesis

https://builds.sr.ht/~csantosb/job/1500903#task-test_hdlmake_synth

Uses verification #osvvm library and #openlogic standard #vhdl, along with #ghdl for simulation, #hdlmake for project creation and #yosys for synthesis.

All dependencies are manipulated with a declarative manifest file.

https://git.sr.ht/~csantosb/ip.alu/tree/test/item/.builds/manifest.scm