Lmst

CursedFootprint boosted:

I know you've heard about dual-row QFN, but have you met dual-row QFP (with mixed gull-wing and J-leads, no less)? cc @CursedFootprint

Screenshot of the NXP SOT1940-1 / PQFP-E-172 package drawing. It has 172 pins with long and short pins interleaved with one another.

Land pattern recommendation (for the solder mask layer) for that same package, clearly showing the dual row structure.

The pitch of each row is 0.65mm and the two rows are staggered, so there's a pad every 0.325mm along each axis.

CursedFootprint boosted:

After soldering, this is how you count >_>

BQ25672

@CursedFootprint

CursedFootprint boosted:

Sort your shit out, TI. Just give me normal dimensions for those corner L-shaped pads instead of demanding that I do the geometric maths on it.

Ping @CursedFootprint

An IC PCB land pattern, with many dimensions indicated. The 4 most complex pads, L-shapes in each for the 4 corners, do not have useful dimensions indicated and must be derived from other dimensions.

CursedFootprint boosted:

Ah yes, the totally standard positive stripe electrolytic cap.

CursedFootprint boosted:

This is a sister part to one I currently use. Thankfully the one I use is a nice sane 676-BGA with a uniform 1mm pitch, not whatever this mess is.

cc: @CursedFootprint

Strange LGA package with both round dots and elongated pads of two different sizes, spaced in a staggered, depopulated array with no obvious rhyme or reason to the layout

@esden packages are just one dimension bigger than footprints, so close enough to me

@esden 👀

CursedFootprint boosted:

Err, what?

[It is an SMD pushbutton]

CursedFootprint boosted:

sunday morning trawling mouser for chips and wow. I have not had enough coffee for this.

Rendering of a Texas Instruments chip that looks like a QFN, but whose underside has long lines of metal connecting pads on opposite sides.

CursedFootprint boosted:

Cursed BGA package (from https://youtu.be/rVJwcZavr9U?t=1311)

A large-ish BGA package on a green circuit board surrounded by various parts, mostly surface mount ceramic capacitors. The lid has cutouts for three angled coaxial RF connectors.

On top side of the package, 122-2-028 is written using black marker.
The package itself is labeled
KEYSIGHT
1NP4-0003
Q012701
2048-1
KOREA

CursedFootprint boosted:

Where's pin 1?

DC-DC module with a gold dot in one corner and a black ink dot in another corner

CursedFootprint boosted:

And it plugs into this weird thing: The ST M48T35Y-70MH1
That's a 32 kilobyte SRAM & realtime clock.

They call this a SOIC28 but it has 32 pins, it's just that 4 are on top.

CursedFootprint boosted:

It finally arrived. I got one of the plessy amplifier chips with a bolt stuck to the top.
I'll see if I can x-ray it tomorrow. @philpem I think you were interested in this.

Edit to add - the bolt is to attach a heatsink.

A black rectangle integrated circuit with 5 pins visible and a bolt sticking up from the top surface.

@th @jpm @NanoRaptor I even made a GIF on the bird site (https://twitter.com/CursedFootprint/status/1512029383091007489)

CursedFootprint boosted:

What. The. Fuck? @CursedFootprint

Edit: this is not a @NanoRaptor shitpost, it’s real. Datasheet at https://www.mitsubishielectric.com/semiconductors/powerdevices/datasheets/dipipm/s-mini/ver6/pss15s92e(f)6-ag_e.pdf

An IC or module of some kind. Appears to be some kind of DIP module, but the pins are irregularly spaced

CursedFootprint boosted:

I would like to wish the designer of this package ballout (STM32H735 UFBGA176+25) a very merry WHAT WERE YOU SMOKING?

Not one port is even *close* to contiguous. I can't fault the package designer exclusively because (based on looking at other STM32s) the pins aren't arranged logically on die either. But why? It's not like this is custom analog logic or some kind of timing critical memory PHY interface or something. We're talking MCU GPIOs, they should have near complete freedom to put them anywhere they want as long as they can hang off the same AHB/APB bus as the other IOs.

Somehow FPGAs which work with much faster signals manage to pin out each I/O bank in a single, non-overlapping chunk of pins.

BGA pinout drawing color coded by I/O port. Pins are scattered all over the place with no rhyme or reason

@azonenberg "oh you know, just in case you need to route stuff on top of each others, we're trying to help here"

This one annoys me more than it should

WLCSP 2.482 x 2.464 mm package from NRF52810 with an intermediary row to let more space for a single ball

CursedFootprint boosted:

How wide is pin 1?

Mechanical drawing of a relay showing dimensions for various pins but it's not clear how big pin 1 is

CursedFootprint boosted:

@CursedFootprint the glorious Texas Instruments VQFN-HR

Client Info