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RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration.
@risc_v twitter feed
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Join the Austin RISC-V group online next week for a Show & Tell! You don’t want to miss this one 👀 RSVP to save your spot today ➡️ https://riscv.org/event/austin-meetup-virtual-february-2024/?hss_channel=tw-2694452875
What to expect:
✅ SiFive Unmatched
✅ StarFive Vision 2
✅ SIPEED Lichee Pi 4A
Original tweet: https://twitter.com/risc_v/status/1756046564672307701
“MEEP isn’t just an infrastructure, it’s more than that. It’s about the contributions to the RISC-V ecosystem in many of the layers of the open stack (software and hardware).” - Vanessa Fernandez of @BSC_CNS
Read more about MEEP here: https://riscv.org/news/2024/02/catching-up-with-meep-bringing-forward-the-development-of-tomorrows-european-exascale-supercomputing/ @CORDIS_EU
Original tweet: https://twitter.com/risc_v/status/1755683669941907702
According to The SHD Group, RISC-V is projected to be in billions of devices, gaining significant market penetration.
@EETimes_EU has more on #RISCV’s growth in Europe and across industries: https://riscv.org/news/2024/02/navigating-the-risc-v-revolution-in-europe/?hss_channel=tw-2694452875 #RISCVeverywhere
Original tweet: https://twitter.com/risc_v/status/1755320780387205624
Accelerate your RISC-V Career! The RISC-V Foundational Associate Certification was created to help you stand out.
Get certified now! https://riscv.org/certifications-and-courses/?hss_channel=tw-2694452875 #LearnRISCV #TrainingCertification #RVFAcertification
Original tweet: https://twitter.com/risc_v/status/1754960407628779662
“If RISC-V succeeds, the world is a better place.” - Dale Greenley of Ventana Micro Systems
Listen to leaders from @arteris_noc, @synopsys, @tenstorrent, and @VentanaMicro discuss chiplets in the RISC-V ecosystem and how #RISCV enables new technologies: https://www.youtube.com/watch?v=CsFavFMdaBg&list=PL85jopFZCnbMfMRR25ENcRkhhAUGwP5C5&index=81&t=7s
Original tweet: https://twitter.com/risc_v/status/1754597513602933137
RT from ACL Digital (@ACL_Digital)
RISC-V is transforming the chip design environment rapidly. Join our expert, Ramesh T.P, and take a deep dive into the world of RISC-V.
Register here: https://zoom.us/webinar/register/WN_2ub5MdTfQHiXcnJ32bF56w#/registration
#RISCV #RTLDesign #Webinar #SiliconEngineering #SemiconductorEngineering #ChipDesign #TechWebinar
Original tweet: https://twitter.com/ACL_Digital/status/1754558098394820686
Responding to community feedback, we're excited to relaunch the improved version of the "Introduction to RISC-V" course, incorporating your valuable input.
Elevate your learning: https://www.edx.org/learn/computer-science/the-linux-foundation-introduction-to-risc-v?hss_channel=tw-2694452875 #LearnRISCV #RISCVcommunity #FREEonlineCourse
Original tweet: https://twitter.com/risc_v/status/1753872989915865193
#RISCV is gaining global momentum, expanding its presence, and influencing industries like #AI and space.
Check out videos from #RISCVSummit North America to learn more: https://consent.youtube.com/m?continue=https%3A%2F%2Fwww.youtube.com%2Fplaylist%3Flist%3DPL85jopFZCnbMfMRR25ENcRkhhAUGwP5C5%26cbrd%3D1&gl=BE&m=0&pc=yt&cm=2&hl=nl&src=1 #RISCVeverywhere
Original tweet: https://twitter.com/risc_v/status/1753465307656560804
“RISC-V is revolutionizing edge computing and fundamentally reshaping the broader computing landscape by promoting innovation, collaboration, and democratization.”
Read @OpenSourceForU’s article to learn more: https://riscv.org/news/2024/01/risc-v-open-source-architecture-redefining-the-future-of-computing/?hss_channel=tw-2694452875 #RISCVeverywhere
Original tweet: https://twitter.com/risc_v/status/1753147714475339856
“The age of full-fledged RISC-V data center CPUs is nearly upon us...”
@VentanaMicro’s #RISCV CPU, Veryon V2, offers higher performance than what is possible with a traditional CPU without hardware acceleration. @tomshardware has more: https://riscv.org/news/2023/11/ventanas-192-core-risc-v-cpu-takes-aim-at-amd-epyc-genoa-and-bergamo/?hss_channel=tw-2694452875 #RISCVeverywhere
Original tweet: https://twitter.com/risc_v/status/1752815269213282544
“There are now more than 13 billion – yes that’s billion with a B – cores on the market. And we’re not stopping!”
RISC-V’s @mark_riscv shared his top predictions for 2024 with @EDA_CAFE. Read about what’s in store for #RISCV here: https://riscv.org/news/2024/01/edacafe-industry-predictions-for-2024-risc-v/
Original tweet: https://twitter.com/risc_v/status/1752795213914141173
📅🚨 Mentorship Applications Deadline Approaching: Tues Feb 6th, 2024. Don't miss your chance to contribute ideas & solutions that can potentially influence the development & future of Open Standard ISA! Apply today: https://riscv.org/risc-v-mentorship-program/?hss_channel=tw-2694452875 #PaidMentorships
Original tweet: https://twitter.com/risc_v/status/1752452378924585088
Don’t miss @risc_v’s @DesignConEvent panel this Thursday, Feb. 1 at 4 p.m. PT to learn how #RISCV is transforming the future of #automotive compute development. 🚗
Join #RISCV and leaders from @Andes_Tech, @BrekerSystems, @Codasip, and @mips_riscv! https://dcon24.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleid=289&hss_channel=tw-2694452875
Original tweet: https://twitter.com/risc_v/status/1752422182238511516
Announcing the enhanced version of our "Introduction to RISC-V" course! We've carefully listened to your feedback and made significant improvements to deliver an even more enriching learning experience.
Dive into the upgraded content: https://www.edx.org/learn/computer-science/the-linux-foundation-introduction-to-risc-v?hss_channel=tw-2694452875 #LearnRISCV
Original tweet: https://twitter.com/risc_v/status/1752376883394613602
RT from BellSoft (@bellsoftware)
With the rise of @risc_v architecture in various industries, the demand for solid Java support is soaring. The release of #LibericaJDK with RISC-V Linux Port reinforces #BellSoft's commitment to provide developers with the most complete #Java experience: https://bell-sw.com/blog/bellsoft-releases-liberica-jdk-21-for-risc-v-with-support/
Original tweet: https://twitter.com/bellsoftware/status/1752338019628044291
RT from Imagination Technologies (@ImaginationTech)
You can catch up on all our appearances from the #RISCV summit in November on demand.
That includes our very own Ravindranath Munnan's talk on the adoption of ISO 26262 for RISC-V where he considers the features, strengths, and limitations of RISC-V ISA.
Original tweet: https://twitter.com/ImaginationTech/status/1751960884585333200
“There isn't a piece of computer science that isn't being worked on for RISC-V.” - Mark Himelstein, CTO of RISC-V International
Watch @mark_riscv’s #RISCVSummit keynote to hear more about present and future advancements of #RISCV: https://www.youtube.com/watch?v=hteicuHE2us&list=PL85jopFZCnbMfMRR25ENcRkhhAUGwP5C5&index=43 #RISCVeverywhere
Original tweet: https://twitter.com/risc_v/status/1752013993697308701
Join @risc_v and leaders from @Andes_Tech, @BrekerSystems, @Codasip, and @mips_riscv on Thursday, Feb. 1 at 4 p.m. PT to listen to their DesignCon panel about how #RISCV is transforming the future of #automotive compute development. 🚗
Register here: https://dcon24.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleid=289&hss_channel=tw-2694452875
Original tweet: https://twitter.com/risc_v/status/1750972372461478076
Collaboration is an integral part of the #RISCV ecosystem! You can now watch members showcase their #RISCV collaborations and advancements on our YouTube channel. https://consent.youtube.com/m?continue=https%3A%2F%2Fwww.youtube.com%2Fplaylist%3Flist%3DPL85jopFZCnbMfMRR25ENcRkhhAUGwP5C5%26cbrd%3D1&gl=BE&m=0&pc=yt&cm=2&hl=nl&src=1 #RISCVeverywhere #RISCVSummit
Original tweet: https://twitter.com/risc_v/status/1750612005671576054