Lmst

This book has just arrived. Let's see what all the fuss is about and whether the #mos6502 or the #z80 is the better CPU... 😉

German edition of the book "Programming the Z80" by Rodnay Zaks

@dendrobatus_azureus @sotolf It's #MOS6502 assembly, and assuming a #C64, it jumps right in the middle of some hw init routine, writing a CIA register with whatever the accumulator currently holds .... and THEN causes a software interrupt, which was typically only used for patching (non electrically-erasable) ROM?* 🤔

Ok, just in case I miss something obvious: Is this code supposed to make any sense? 😆

* could be used for poor-man's syscalls / context switching, but I guess that's not contemporary style 😏

Five minutes until we code some #mos6502 assembly! Wait... I can't code 6502? Oh, never mind! We'll try anyway!

Old school DRAMs have a lot of timing requirements. I’ve been validating output from the #CPCZERO sequencer prototype against them - and everything checks out 🙂

Comments in my notes are where the timings depend on other components, such as the multiplexers.

#mos6502 #Homebrewcomputer #amstrad

4164-12 timing diagram with my annotations.

A page of timing details from the data sheet. This is most of the relevant numbers.

My notes listing relevant timing requirements versus measured data. This is for a read cycle. Most of also apply to a write cycle.

I recently took a dive into #C11 #atomics to come up with alternative queue implementations not requiring locking some #mutex.

TBH, I have a hard time understanding the #memory #ordering constraints defined by C11. I mean, I code #assembler on a #mos6502 (for the #c64), so caches, pipelines and all that modern crap is kind of alien rocket science anyways 😆.

But seriously, they try to abstract from what the hardware provides (different kinds of memory barrier instructions, IMHO somewhat easier to understand), so the compiler can pick the appropriate one depending on the target CPU. But wrapping your head around their definition really hurts the brain 🙈.

Yesterday, I found a source telling me that #amd64 (or #x86 in general?) always has strong ordering for reads, so no matter which oderding constraint you put in your atomic_load and friends, the compiler will generate the same code and it will work. Oh boy, how should I ever verify my code works on e.g. aarch64 without owning such hardware?

memory ordering constraints in my lockfree variant of the queue used to schedule commands for a different service thread. Are they correct? 🤔

¡El MOS Technology KIM-1 (1976) fue la pequeña gran máquina que democratizó la computación! 💻 Basado en el 6502, este kit accesible fue la puerta de entrada para miles de programadores y sentó las bases de la era de las PCs. #retrocomputingmx #Kim1 #MOS6502 #efeméridestecnologica
https://retrocomputingmx.com/tdxk

I've just published the sources for #QR_code generator adapted and optimized #Oric,#MOS6502. Original code by: @the8bittheory.
LINK: 😎https://github.com/iss000/oricOpenLibrary/tree/main/lib-qrcode

What started out as a repair video for a broken PET 3032 became a video on repairing two PET keyboards first: https://youtu.be/bPpjxiyjXZ8 (the rest of the repair is to follow)
#8bit #mos6502 #commodore #commodorepet