SYSOP-64 Expands Commodore 64 Possibilities
#Commodore64 #SYSOP64 #FPGA #RetroComputing #DE10Nano #LinuxOnC64 #HackLab #BloodMosher #C64HDMI
https://theoasisbbs.com/sysop-64-expands-commodore-64-possibilities/?feed_id=3867&_unique_id=68516cf0ad61e

Foenix F256K2 and Junior 2 – FPGA Retro Power Redefined
#FoenixRetroSystems #F256K2 #Junior2 #RetroComputing #FPGA #AnyBitFeverDreams #RetroHardware #CommodoreInspired
https://theoasisbbs.com/foenix-f256k2-and-junior-2-fpga-retro-power-redefined/?feed_id=3871&_unique_id=685169ac73e42

Je vais monter une ESN en FPGA qui fait du code sans warning.

On livrera du code synthétisable sans aucun warning !

Si je ne peux pas livrer le code j'offrirais une licorne à la place, c'est plus plausible.

#flf #fpga #warning #esn

Самодельный SDR приемник на Zynq

В этой статье я расскажу о том, как я делал предельно дешевый КВ Web-SDR приемник на SoC Zynq. Основа приемника - Б/У плата Antminer S9. Фактически этот проект является форком уже существующего приемника WEB-888, который, в свою очередь, является продолжением приемника KiwiSDR.

https://habr.com/ru/articles/898490/

#sdr #zynq #fpga #diy

tinygo-tkey: develop Applications using TinyGo on the Tillitis TKey-1, an open source, open hardware FPGA-based USB security token #FPGA #Programming https://github.com/hybridgroup/tinygo-tkey

#Nachtkerzen sind sehr schöne #Blumen, deren Blüten sich abends so schnell öffnen, daß man den Öffnungsvorgang ohne Hilfsmittel beobachten kann und die dann sie ganze Nacht blühen und nachtaktive Insekten versorgen.

_ _ _ _ _ _ N _ E _ L _ _ E _ (15)

Was macht ihr denn nachts? Wie Lustig, die Anfangsbuchstaben bilden die Abkürzung #FPGA. Das hat aber nichts mit der Lösung zu tun.

@galgodon #galgenmasto #galgenfedi

@postroutine I've used Verilator, and it works reasonably well given what it's trying to do. Terribly low-level, though. #fpga #verilog

IceVIC HDMI Output for Commodore 64
#Commodore64 #C64 #IceVIC #TangNano20K #FPGA #RetroComputing #HDMIOutput #C64Tech #BloodMosherHackLab
https://theoasisbbs.com/icevic-hdmi-output-for-commodore-64/?feed_id=3839&_unique_id=685017024ec52

Oric core which was updated on Sidi recently, has been updated on MiST too! ⌨️

You can download it from Atari-Forum (still not in the repository):

https://www.atari-forum.com/viewtopic.php?p=481249#p481249

#MiSTBoard #FPGA #Oric

News from Jotego arcade cores 🕹️😃

- JTCIRCUS: Fixed jumping for a 4th time in a drum in 3rd stage doesn't show the clown trespassing the circus tent in Circus Charlie.

- Support for selecting characters for four-player games in JTTMNT and JTSIMSON cores.

MiST: https://github.com/jotego/jtbin/tree/master/mist

Sidi: https://github.com/jotego/jtbin/tree/master/sidi

#MiSTBoard #Sidi #FPGA #Arcade

For a school project, I need to choose between 2 Verilog simulator: Verilator or Iverilog.

But I don't know which one to choose.

Any advice ?

#FPGA
#Verilog

Der 16. WSS Weinen Schreien Selbstmitleid Stream startet in wenigen Minuten. Ok vielleichts heißts auch Wunsch Spiele Stream voll mit widerlichen Spielewünschen der Community - Expemplarisches Beispiel Boogerman. Das kann ja alles nur schiefgehen heute #retro #twitch #stream #fpga #misterfpga

Two hackers going at it ... https://github.com/ams/cadr4/commits/master/ #LispM #LispMachine #MIT #CADR #FPGA #VHDL

The MiSTer's main branch got an update for the Saturn core as well as the newly minted arcade ST-V core! Find out what's been fixed recently in my story:

https://www.segasaturnshiro.com/2025/06/13/saturn-core-updates-added-to-misters-main-branch/

#sega #saturn #segasaturn #retrogaming #retrogames #videogames #MiSTerFPGA #MiSTer #FPGA

#radio #mesh using #reticulum #beechat #kaonic1S #ofdm #FPGA https://youtu.be/OX9hP8WIC0Y

https://beechat.network/product/kaonic-1s/
https://github.com/orgs/BeechatNetworkSystemsLtd/repositories

I see my HDMI RX layout in a new light now that I have a solder-in 4 GHz active differential probe (Lecroy D420-A). The 0402 series caps are pretty small to solder onto (the other passives are the HDMI-to-GTP LR network). The ESD diode array footprint in front of the redriver-retimer is also tempting, but also so small…

#Lecroy #oscilloscope #FPGA

Foenix Core Update Announced for F256K2 and JrJr Units
#FoenixF256 #F256K2 #F256JR2 #RetroComputing #FPGA #HomebrewHardware #StefanyAllaire #FoenixRetroSystems
https://theoasisbbs.com/foenix-core-update-announced-for-f256k2-and-jrjr-units/?feed_id=3827&_unique_id=684c285988220

The recent EDA ban on China by Washington could be a catalyst for Europe to advance in open hardware. FPGAs offer flexibility and cost-efficiency, making them ideal for prototyping and innovation. With the right investment, Europe could lead the way in technological sovereignty. #FPGA #OpenSource #TechSovereignty https://fossforce.com/2025/06/as-eda-ban-hits-china-will-europe-step-up-on-open-hardware/

Me: Mom, I want to watch One Piece on the big screen!
Mom, who is an FPGA development board: We have One Piece on the big screen at home.

Verilog-based image stream decoder. A Ruby script sends 96x64 256 color images, each with a unique palette, over UART at 921600 baud at around 13 FPS, and the ULX3S renders them on the OLED screen with double-buffered palettes and image data. Definitely the most complex serial protocol-driven stuff I've written so far. I may try moving the image data storage over to SDRAM, just because. #fpga

Potentially daft question on #FPGA and #VIVADO
I'm trying to see the address that I'm writing to on the LEDs, but I don't.. I *do* see the data though, regardless of what address I write to (provided it is in the range assigned to the BRAM controller).
Do I need some kind of latch to be able to latch the address?
Maybe with the bram_we_a lines?